1. Field of the Invention
The present invention relates to a lowpass filter circuit, and more particularly, a lowpass filter circuit with improved D.C. offset performance.
2. Description of the Related Art
Generally, filtering circuits may be divided into three distinct categories: highpass, bandpass, and lowpass. Of these three filter categories, usually only lowpass filters have design considerations related to D.C. voltage levels.
Conventionally, integrated circuit (I.C.) filters are commercially available in many types, such as Butterworth, Chebychev, Bessel, etc., and may be of various orders. The frequency characteristics of these integrated circuit filters are often easily adjustable. For example, in conventional switched capacitor lowpass filters, a single clock frequency may be used to select the upper frequency cutoff.
In some filtering applications, it is necessary to prevent a D.C. offset from being introduced by the filtering circuit. D.C. offset refers to unwanted D.C. voltage differences between the input and output of a filtering circuit. For example, the D.C. offset of a linear filter circuit is the D.C. (zero-frequency) component of the output signal when the D.C. component of the input signal is zero. In particular, it is often necessary to ensure that the D.C. voltage level of an input signal is faithfully passed through the lowpass filter and is present at the output. A drawback to conventional I.C. lowpass filters is that they often introduce an undesired D.C. offset voltage.
A conventional approach to this problem has been to add a resistive-capacitive (R-C) lowpass filter external and in parallel to the I.C. filter to pass the D.C. input voltage level through to the output. However, this additional resistor and capacitor form one of the poles that determine the overall frequency characteristics of the filter circuit, and this pole is not easily adjustable.
Another conventional attempt to correct this D.C. offset problem has been to use an integrator connected to the output of the lowpass filter to generate a feedback signal to reduce the D.C. output of the filter to zero. However, this approach simply eliminates any D.C. component from the output, and undesirably removes any D.C. component that was present in the input signal.